View WED7GXXXATA33_1336002.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

White Electronic Designs
DIMMDrive Solid State ATA Flash Module
FEATURES
144 Pin SO-DIMM, JEDEC package Plug-and-play solid state disk NAND Flash memory technology by SanDisk PC CARD ATA compatible - memory mapped or I/O operation 3.3 volt & 5.0 volt power supply operation 16MB - 768MB memory density - (1GB - Q3/02) Low Power Consumption ECC error correction Supports true IDE mode 8Kbyte data buffers Broad O/S support: DOS, Linux, Windows 3.X, Windows 95, Windows NT4.0/5.0, Windows CE, others Compatible with major processors: x86, Media GX, PowerPC, 68K, MIPS, SHx, StrongArm, others Full Hard Disk emulation and Boot capability Easy to use interface, JEDEC standard Supports power down commands and sleep modes Commercial temperature range 0C + 70C Industrial temperature range -40C +85C
WED7GXXXATA33
PRELIMINARY*
The DIMMDrive WED7GXXXATA33 is a high performance single chip flash disk module available in 144 Pin SO-DIMM package. The module is based on SanDisk NAND Flash technology and utilizes the 128Mb, 256Mb, 512Mb or 1Gb memory components to provide the maximum in module density. The DIMMDrive WED7GXXXATA33 utilizes a SanDisk Flash ChipSet controller which is designed specifically for use as a Flash mass storage controller for the SanDisk memory devices. This interface allows a host computer to issue commands to read or write blocks of memory in the Flash memory array. The intelligence to manage the interface protocols, data storage and retrieval as well as ECC, defect handling and diagnostics are controlled by this device. Automatic power management and clock control is handled by the controller as well. The DIMMDrive WED7GXXXATA33 module will have the same functionality and capabilities of an intelligent ATA (IDE) disk drive. An advantage of the on board Flash controller and it's ATA command set, is the ease of software development by the user. Once the device has been configured by the user, it appears to the host as a standard ATA disk drive. Additional ATA commands have been provided to enhance the system performance. The on-board controller is a highly integrated solution and the controller is designed to handle all intelligent operations, even the rare cases when new defects arise and need to be mapped out or replaced by a spare. The hardware performs the complicated task of ECC detection and correction and will return good data to the host. The controller manages all defects and errors and makes the Flash memory appear as perfect memory to the host. The DIMMDrive WED7GXXXATA33 module also provides a more cost effective solution to the traditional hard disk media. The module is perfect for applications requiring upgradeability to higher densities and for those applications with limited space availability and power consumption requirements. Unlike standard IDE drives, no cables or extra space is required. The module has no moving parts providing significant reduction in power consumption and increasing reliability. Simply insert the module into a standard 144 Pin SO-DIMM socket and you then have a bootable flash disk. The DIMMDrive WED7GXXXATA33 is available with memory densities of 16MB to 768MB today with 1GB density available in Q3/02.
DESCRIPTION
MODULE APPLICATIONS
Embedded systems Set Top Boxes WEB Browser Routers, Networking WEB phones, car PC, DVD, HPC Point-of-sale Medical and Telecom Other applications requiring embedded or solid state storage
* This datasheet is preliminary, therefore all specifications are subject to change without notice.
Internet Access Devices
White Electronic Designs Corp. reserves the right to change products or specifications without notice. July, 2002 Rev. 0 1 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
MODULE PINOUT
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 SIGNAL VSS VSS DQ0 Reserved DQ1 Reserved DQ2 Reserved DQ3 Reserved VCC VCC DQ4 Reserved DQ5 Reserved DQ6 Reserved DQ7 Reserved VSS VSS CE0# Reserved CE1# Reserved VCC VCC A0 A3 A1 A4 A2 A5 VSS VSS NOTE PIN 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 SIGNAL DQ8 Reserved DQ9 Reserved DQ10 Reserved DQ11 Reserved VCC VCC DQ12 Reserved DQ13 Reserved DQ14 Reserved DQ15 Reserved VSS VSS Reserved Reserved Busy NC BVD1 BVD2 VCC VCC RST IOWR WE# IORD Reserved REG Reserved INPACK NOTE 1 1 1 1 PIN 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 SIGNAL OE# IO16 VSS VSS Reserved Reserved Reserved Reserved VCC VCC Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved VSS VSS Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved VCC VCC A6 A7 A8 NC VSS VSS NOTE 3 PIN 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144
WED7GXXXATA33
PRELIMINARY*
1 1 1 1
4 3 3
1
4 3 3 3 3
2 2
2 2 2
SIGNAL A0 NC A10 Reserved VCC VCC Reserved Reserved Reserved Reserved VSS VSS Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved VCC VCC Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved VSS VSS Reserved Reserved VCC VCC
NOTE 2 4
Note: 1.) 16-Bit bus mode signals not used (floating) in 9-bit mode CE1# signal in 16-bit only mode should be tied to CE0# 2.) Optional addresses, do not have to be connected for module use in Memory Mapped Mode 3.) Optional test signals not used in Memory Mapped Mode 4.) Busy, RST and A10 signals are optional in Memory Mapped Mode NC - pins internally not connected
White Electronic Designs Corp. reserves the right to change products or specifications without notice. July, 2002 Rev. 0 2 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
White Electronic Designs
SIGNAL DESCRIPTION
Signal Name DQ0-DQ7, DQ8-DQ15 CE0#, CE1# OE# WE# A0-A10 Busy RST BVD1 BVD2 IOWR IORD REG INPACK IO16 Reserved VCC VSS NC
WED7GXXXATA33
PRELIMINARY*
Description Data bus can either be 8-bits or 16-bits wide depending on selection of CE0# and CE1# CE1# always selects the odd byte of the word. CE0# accesses the even or odd byte depending on A0 and CE1#. For 8-bit systems, CE0# is used and for 16-bit systems, both CE0# and CE1# are used. Both CE0# and CE1# should be decoded by the logic to determine the memory window. This is an output enable strobe generated by the host interface. It is used to read data from the Flash ChipSet in Memory Mode and to read the CIS and configuration registers The write enable pin is driven by the host and used for strobing data to the registers of the Flash ChipSet when the Flash ChipSet is configured in the memory interface mode. It is also used for writing the configuration registers. A0-A3 selects the basic registers of the controller to communicate to the module. This requires 16 bytes of host address space. A0 is optional if CE0# and CE1# are combined to enable 16-bit wide register access. The Busy signal is driven low when the product is accessing memory. When Busy is high, register access is allowed. After a data transfer command is issued, this signal is used to signify that the host can transfer data. When RST is high, the product is placed in a reset mode. This signal is only valid at power on. This signal is driven high since a battery is not used with this product This output line is always driven to a high state in Memory Mode since a batery is not required for this product This signal is not used in the memory mode. This signal is not used in the memory mode. This signal is used during Memory Cycles to distinguish between common memory and register memory accesses. High for common memory, low for attribute memory. This signal is not used in the memory mode. Optional test signals not used in the Memory Mapped Mode. Pins are reserved for future expansion and must be left floating. Power pins. All VCC pins must be connected. Ground pins. All VSS pins must be connected. No connect. Pin internally not connected.
BLOCK DIAGRAM
A0 - A10
CE0
D0 - D7
1 Data SanDisk Controller Control
2
n
6
D8 - D15
NAND Flash
CE1
BUSY
Control signals used in other modes (see pin list)
White Electronic Designs Corp. reserves the right to change products or specifications without notice. July, 2002 Rev. 0 3 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
RST
WE
OE
White Electronic Designs
PACKAGE
2.660
C8 C10 J3 J4 C15 R7 D1 J5 U3 R4 C13 J2 J6 C11 C12 C17 U1 J1 R8 C7 C14 C16 C6 M1 C1
WED7GXXXATA33
PRELIMINARY*
.150 MAX.
.157
C9
WEDC 271
U2 R1 R2 R3
M0
1.045 .787 .157 MIN.
C0
P1
.913 1.112
1.291 .181
.050 .0039
ALL DIMENSIONS ARE IN INCHES
White Electronic Designs Corp. reserves the right to change products or specifications without notice. July, 2002 Rev. 0 4 White Electronic Designs Corporation * (602) 437-1520 * www.wedc.com
M2
C2 C3 M3 C4 M5 M4 C5
P2

▲Up To Search▲

Price & Availability of WED7GXXXATA33

	To Download WED7GXXXATA33 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .